VIBRO 200-566-101-012模塊使用流程
更換機箱或系統(tǒng)護蓋，確保沒有電纜擠壓。用電纜將外圍設(shè)備連接到面板連接器，然后重新連接將系統(tǒng)接至交流或直流電源，并轉(zhuǎn)動設(shè)備打開電源。注：并非所有外圍電纜均配備MVME761；你可能需要制造或購買某些電纜。（最小化輻射，摩托羅拉建議外圍設(shè)備使用屏蔽電纜盡可能連接。）系統(tǒng)注意事項MVME2603/2604從VMEbus背板連接器供電P1和P2。
VIBRO 200-566-101-012模塊使用流程P2還用于32位傳輸中的高16位數(shù)據(jù)，對于擴展尋址模式中的上八個地址行。這個如果沒有主板，MVME2603/2604可能無法正常工作連接到VMEbus背板連接器P1和P2。MVME2603/2604是作為VMEbus主機還是作為VMEbus從機，配置為32位地址和32位數(shù)據(jù)（A32/D32）。然而，它處理地址范圍內(nèi)的A16或A24設(shè)備如第2章操作說明所示。D8和/或D16設(shè)備系統(tǒng)必須由PowerPC處理器軟件處理。提到第2章操作說明中的內(nèi)存映射。MVME2603/2604包含共享的板載DRAM（以及可選的，二級緩存），其基址是軟件可選擇的。二者都板載處理器和非板載VMEbus設(shè)備可以看到此本地DRAM在基本物理地址$00000000處，由固件編程。這可以通過軟件更改為任何其他基址。請參閱MVME2600系列單板計算機程序員參考有關(guān)更多信息，請參閱附錄D相關(guān)文件中列出的指南信息如果MVME2603/2604試圖以不存在的方式訪問非車載資源位置，并且不是系統(tǒng)控制器，如果系統(tǒng)沒有全局總線超時，MVME2603/2604永遠(yuǎn)等待VMEbus循環(huán)完成。這將導(dǎo)致系統(tǒng)鎖定。只有一個系統(tǒng)可能缺少此全局總線超時的情況：當(dāng)MVME2603/2604不是系統(tǒng)控制器，也沒有全局總線系統(tǒng)中其他位置超時?？梢栽趩蝹€VME機箱中安裝多個MVME2603/2604。在里面一般支持硬件多處理器功能。
Replace the chassis or system cover(s), making sure no cables are
pinched. Cable the peripherals to the panel connectors, reconnect
the system to the AC or DC power source, and turn the equipment
power on.
Note Not all peripheral cables are provided with the MVME761; you
may need to fabricate or purchase certain cables. (To minimize
radiation, Motorola recommends shielded cable for peripheral
connections where possible.)
System Considerations
The MVME2603/2604 draws power from VMEbus backplane connectors
P1 and P2. P2 is also used for the upper 16 bits of data in 32-bit transfers,
and for the upper eight address lines in extended addressing mode. The
MVME2603/2604 may not function properly without its main board
connected to VMEbus backplane connectors P1 and P2.
Whether the MVME2603/2604 operates as a VMEbus master or as a
VMEbus slave, it is configured for 32 bits of address and 32 bits of data
(A32/D32). However, it handles A16 or A24 devices in the address ranges
indicated in Chapter 2, Operating Instructions. D8 and/or D16 devices in
the system must be handled by the PowerPC processor software. Refer to
the memory maps in Chapter 2, Operating Instructions.The MVME2603/2604 contains shared onboard DRAM (and, optionally,
secondary cache memory) whose base address is software-selectable. Both
the onboard processor and offboard VMEbus devices see this local DRAM
at base physical address $00000000, as programmed by the firmware. This
may be changed via software to any other base address. Refer to the
MVME2600 Series Single Board Computer Programmer’s Reference
Guide, listed in Appendix D, Related Documentation, for more
information.
If the MVME2603/2604 tries to access offboard resources in a nonexistent
location and is not system controller, and if the system does not have a
global bus timeout, the MVME2603/2604 waits forever for the VMEbus
cycle to complete. This will cause the system to lock up. There is only one
situation in which the system might lack this global bus timeout: when the
MVME2603/2604 is not the system controller and there is no global bus
timeout elsewhere in the system.
Multiple MVME2603/2604s may be installed in a single VME chassis. In
general, hardware multiprocessor features are supported.
